The CPU redefined: AMD Torrenza and Intel CSI

Geneseo

AMD's plans with Torrenza are ambitious to say the least and the large amount of support that AMD has received means that this technology has a realistic chance of success. Intel cannot afford to sit on its laurels and has already announced its own plans. The largest chip manufacturer in the world has placed its bets on two different horses; first Intel wants to release a new version of the PCI-Express bus, code named Geneseo, onto the market, which will be better suited for using expansion cards fitted with co-processors. Intel will also be developing its own counterpart to Torrenza.

During the last Intel Developer Forum it was announced that Intel would be developing Geneseo together with IBM. This new standard should see the light of day somewhere in 2008 and will be the direct successor to the current PCI-Express 2.0 standard which will be released some time this year. Intel is currently keeping quiet regarding the technical details for Geneseo and the only statements that have been released are vague promises that co-processors on expansion cards will have higher speeds and lower latencies when communicating with the central processor and memory. Looking at the specifications that have been released, this new technology should allow for co-processors to function more efficiently: think of the possibility of being able to block certain memory sectors or making certain sectors of the memory virtual.

CSI

Planning ahead, Intel is also working on CSI, a new chip-to-chip connection which bears an extremely strong resemblance to AMD's HyperTransport technology. In time CSI will replace the frontside bus of both the Intel Xeon and Intel Itanium. Just as with HyperTransport the processors on CSI will be connected collectively through fast point-to-point data busses with Intel promising transfer speeds of up to 6.4 Gigatransfers a second. Intel is also planning to crossover to an integrated memory controller, based on FB-DIMM, at around the same time that it will release its CSI platform. The first processor to make use of CSI will be the next generation of Itanium processors (codenamed Tukwilla) which is planned for release in 2008. The implementation of CSI for Intel's Xeon, and possibly its desktop processors, will happen in 2009.

Just like Torrenza, Intel will license its CSI bus to manufactureres of co-processors, by which Intel will offer the exact same possibilities as AMD. Apart from the slightly faster speeds, which Intel has promised, there are very few differences between AMD's Torrenza and CSI. AMD's advantage will be that Torrenza is based on technology which is currently available and hence will be able to release its products far sooner than Intel.

Conclusion

All the aforementioned developments will first be implemented in servers, but are definitely worth following to see how things progress. Its more than likely that we will see this technology becoming mainstream around 2010 with desktop systems with multiple sockets, allowing users to install dedicated co-processors to their hearts content. These co-processors will allow the performance of computers to increase exponentially for certain applications, just as has happened with GPU's and 3D applications. Intel and AMD appear to have an almost identical vision of the future, seeing as their respective Torrenza and CSI platforms are almost identical. If these plans will actually take off and which one of the two companies will be the most successful would be like reading the dregs in a teacup.